Abstract:
An electrical rule check program takes simulation output files as input and performs an electrical rule check on the simulation to determine if any electrical design rules have been violated. The program scans a simulation output file to produce a subcircuit name list, an instance name list, and an internal index list for each subcircuit. If the number of circuit nodes is less than a first predetermined value, a window limit is set to equal the number of nodes times the number of data points. If the number of nodes is greater than the first predetermined value and less than a second predetermined value, then the window limit is set to equal some first predetermined fraction of the product of the number of nodes and the number of data points. If the number of nodes is greater than the second predetermined value, then the window limit is set to equal some second predetermined fraction of the product of the number of nodes and the number of data point, where the second predetermined fraction is less than the first predetermined fraction. The program then scans the simulation output file to produce an indexed node name list and a corresponding indexed voltage list to fill the window.