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Matthew J Craighead

Deceased

from Austin, TX

Also known as:
  • Matthew Joseph Craighead
  • Matthew Craighead
  • Matthew D
10926 Jollyville Rd, Austin, TX 78759

Matthew Craighead Phones & Addresses

  • 10926 Jollyville Rd, Austin, TX 78759
  • Avon, CO
  • San Jose, CA
  • 500 Mansion Ct, Santa Clara, CA 95054
  • Mendota Heights, MN

Industries

Computer Software

Resumes

  • Matthew Craighead Photo 1

    Founder/Ceo Of Conifer Systems Llc

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  • Location:
    Austin, Texas Area
  • Industry:
    Computer Software

Us Patents

  • Antialiasing Using Hybrid Supersampling-Multisampling

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  • US Patent:
    6967663, Nov 22, 2005
  • Filed:
    Sep 8, 2003
  • Appl. No.:
    10/658056
  • Inventors:
    Rui M. Bastos - Santa Clara CA,
    Steven E. Molnar - Chapel Hill NC,
    Michael J. M. Toksvig - Palo Alto CA,
    Matthew J. Craighead - Santa Clara CA,
  • Assignee:
    NVIDIA Corporation - Santa Clara CA
  • International Classification:
    G09G005/00
    G06T015/50
  • US Classification:
    345613, 345426
  • Abstract:
    Hybrid sampling of pixels of an image involves generating shading values at multiple shading sample locations and generating depth values at multiple depth sample locations, with the number of depth sample locations exceeding the number of shading sample locations. Each shading sample location is associated with one or more of the depth sample locations. Generation and filtering of hybrid sampled pixel data can be done within a graphics processing system, transparent to an application that provides image data.
  • Apparatus, System, And Method For Gamma Correction Of Smoothed Primitives

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  • US Patent:
    7081902, Jul 25, 2006
  • Filed:
    Sep 24, 2003
  • Appl. No.:
    10/671237
  • Inventors:
    Franklin C. Crow - Portola Valley CA,
    John S. Montrym - Cupertino CA,
    Matthew J. Craighead - Santa Clara CA,
  • Assignee:
    NVIDIA Corporation - Santa Clara CA
  • International Classification:
    G09G 5/00
  • US Classification:
    345611, 345428, 345589, 345593, 345598, 382167, 382261, 382264, 382269
  • Abstract:
    A graphics processor performed gamma correction of the coverage values of pixels. In one embodiment, a gamma correction factor is written into a run-time loadable lookup table of the graphics processor. The gamma corrected coverage values may be used in an anti-aliasing process to form smoothed primitives.
  • System And Method For Display List Occlusion Branching

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  • US Patent:
    7170513, Jan 30, 2007
  • Filed:
    Jul 1, 2002
  • Appl. No.:
    10/188697
  • Inventors:
    Douglas A. Voorhies - Menlo Park CA,
    Matthew Craighead - Santa Clara CA,
    Mark J. Kilgard - Austin TX,
    Edward Hutchins - Mountain View CA,
    Cass W. Everitt - Pflugerville TX,
  • Assignee:
    NVIDIA Corporation - Santa Clara CA
  • International Classification:
    G06T 15/00
  • US Classification:
    345421, 345428, 345619
  • Abstract:
    A system and method are provided for conditional branching in a hardware graphics pipeline. Initially, a plurality of graphics commands is received. Condition data is then affected based on at least some of the graphics commands utilizing the hardware graphics pipeline. At least one of the graphics commands is then conditionally skipping based on the condition data in response to another graphics command utilizing the hardware graphics pipeline.
  • Method And System For Transferring Data Between A Requesting Program And A Hardware Device

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  • US Patent:
    7356621, Apr 8, 2008
  • Filed:
    Sep 23, 2003
  • Appl. No.:
    10/669805
  • Inventors:
    Matthew J. Craighead - Santa Clara CA,
  • Assignee:
    Nvidia Corporation - Santa Clara CA
  • International Classification:
    G06F 13/28
    G06F 13/00
  • US Classification:
    710 22, 710 56, 710208
  • Abstract:
    Transferring data between a requesting program and a hardware device. An program requests a pre-allocation of non-pageable memory. The program requests a transfer via a direct memory access (DMA) from the hardware device into the non-pageable memory. The requesting program is notified when the DMA is complete. The requesting program reads the data from the non-pageable memory. A determination may be made whether a range of addresses specified in the DMA request is within the pre-allocated range of non-pageable memory. If the range of addresses is within the pre-allocated non-pageable memory, the data transfer involves fewer transfers between system memory and the CPU than if the range of addresses is outside the pre-allocated non-pageable memory.
  • Antialiasing Using Hybrid Supersampling-Multisampling

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  • US Patent:
    7511717, Mar 31, 2009
  • Filed:
    Jul 15, 2005
  • Appl. No.:
    11/182676
  • Inventors:
    Rui M. Bastos - Santa Clara CA,
    Steven E. Molnar - Chapel Hill NC,
    Michael J. M. Toksvig - Palo Alto CA,
    Matthew J. Craighead - Santa Clara CA,
  • Assignee:
    Nvidia Corporation - Santa Clara CA
  • International Classification:
    G09G 5/00
    G09G 5/02
  • US Classification:
    345613, 345426, 345611, 345581, 345589
  • Abstract:
    Hybrid sampling of pixels of an image involves generating shading values at multiple shading sample locations and generating depth values at multiple depth sample locations, with the number of depth sample locations exceeding the number of shading sample locations. Each shading sample location is associated with one or more of the depth sample locations. Generation and filtering of hybrid sampled pixel data can be done within a graphics processing system, transparent to an application that provides image data.
  • Faster Clears For Three-Dimensional Modeling Applications

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  • US Patent:
    7528839, May 5, 2009
  • Filed:
    Aug 13, 2003
  • Appl. No.:
    10/641279
  • Inventors:
    Ross A. Cunniff - Fort Collins CO,
    Matthew J. Craighead - Santa Clara CA,
  • Assignee:
    Nvidia Corporation - Santa Clara CA
  • International Classification:
    G09G 5/36
    G06T 17/00
    G06T 15/30
    G06T 1/20
  • US Classification:
    345553, 345420, 345423, 345506
  • Abstract:
    A graphics processing subsystem defines a bounding area as the portion of the display buffer and other memory buffers occupied by one or more rendered objects. When clearing the memory buffers, only the portions of the buffers corresponding to the bounding area need to be cleared. A graphics pipeline includes a bounding area memory to store bounding area values. The bounding area values are modified during rendering so that each rendered primitive falls within the bounding area values. The graphics processing subsystem clears a portion of the memory buffer in response to a clear command specifying a bounding area. The clear command may include a set of bounding area values defining the bounding area, or alternatively a reference to the bounding area memory. For applications that draw objects in isolation, the bounding area will be smaller than the window, resulting in a decreased time requirement for clearing the memory buffer.
  • Faster Clears For Three-Dimensional Modeling Applications

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  • US Patent:
    7898549, Mar 1, 2011
  • Filed:
    Dec 12, 2007
  • Appl. No.:
    11/954543
  • Inventors:
    Ross A. Cunniff - Fort Collins CO,
    Matthew J. Craighead - Santa Clara CA,
  • Assignee:
    NVIDIA Corporation - Santa Clara CA
  • International Classification:
    G09G 5/36
    G06T 1/20
    G06T 17/00
    G06T 15/30
  • US Classification:
    345553, 345420, 345423, 345506
  • Abstract:
    A graphics processing subsystem defines a bounding area as the portion of the display buffer and other memory buffers occupied by one or more rendered objects. When clearing the memory buffers, only the portions of the buffers corresponding to the bounding area need to be cleared. A graphics pipeline includes a bounding area memory to store bounding area values. The bounding area values are modified during rendering so that each rendered primitive falls within the bounding area values. The graphics processing subsystem clears a portion of the memory buffer in response to a clear command specifying a bounding area. The clear command may include a set of bounding area values defining the bounding area, or alternatively a reference to the bounding area memory. For applications that draw objects in isolation, the bounding area will be smaller than the window, resulting in a decreased time requirement for clearing the memory buffer.
  • Sharing Resources Between A Cpu And Gpu

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  • US Patent:
    20110157195, Jun 30, 2011
  • Filed:
    Dec 31, 2009
  • Appl. No.:
    12/655577
  • Inventors:
    Eric Sprangle - Austin TX,
    Matthew Craighead - Austin TX,
    Chris Goodman - Austin TX,
    Belliappa Kuttanna - Austin TX,
  • International Classification:
    G06T 15/00
  • US Classification:
    345522
  • Abstract:
    A technique to share execution resources. In one embodiment, a CPU and a GPU share resources according to workload, power considerations, or available resources by scheduling or transferring instructions and information between the CPU and GPU.

Business Records

Name / Title
Company / Classification
Phones & Addresses
Matthew E Craighead
BRIMARC PROPERTIES, LLC

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Youtube

"It Had To Be You" ~ Josh Duffee Orchestra @ ...

www.myspace.com www.bixsociety.org Song Title "It Had To Be You" Compo...

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  • Uploaded:
    03 Aug, 2010
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"Varsity Drag" ~ Josh Duffee Orchestra @ Bix ...

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